- [FIX] el cursor del debugger sempre anava una instrucció per darrere de PC
- [NEW] El desensamblador sí que pot determinar opcodes cap enrere en el 6502 - [FIX] Fer wrap correcte dels uint16_t per a evitar desbordaments - [FIX] La pila ací va al reves, pintar com toca en el debugger - [FIX] arreglats (supostament) opcodes: PHP, JSR, PLP, RTI, JMP i RTS
This commit is contained in:
Raimon @ quifisraimon
+15
-13
@@ -309,7 +309,7 @@ namespace m6502debugger
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if ( !(tag & MEMTAG_IGNORE) ) tag |= MEMTAG_INST;
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tag |= (!(tag&MEMTAG_TOUCHED) ? MEMTAG_TREPEAT : MEMTAG_TINST);
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setcursor(m6502::getPC());
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setcursor(address);
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history::store();
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}
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@@ -418,12 +418,14 @@ namespace m6502debugger
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uint16_t find_previous_opcode(uint16_t pc)
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{
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pc--;
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if ( !(tags[pc] & (MEMTAG_CODE | MEMTAG_INST) ) ) return pc;
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while ( !(tags[pc] & MEMTAG_INST) ) pc--;
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return pc;
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if (m6502dis::getOpcodeSize(uint16_t(pc-3))==3) return uint16_t(pc-3);
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if (m6502dis::getOpcodeSize(uint16_t(pc-2))==2) return uint16_t(pc-2);
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return uint16_t(pc-1);
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//if ( !(tags[pc] & (MEMTAG_CODE | MEMTAG_INST) ) ) return pc;
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//
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//while ( !(tags[pc] & MEMTAG_INST) ) pc--;
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//
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//return pc;
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}
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void printDissasemblerLine(const uint16_t address, const int line, const bool heuristics=false)
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@@ -447,7 +449,7 @@ namespace m6502debugger
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const int opcodesize = m6502dis::getOpcodeSize(address);
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for (int i=0; i<opcodesize; ++i) {
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const uint8_t tag = tags[address+i];
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const uint8_t tag = tags[uint16_t(address+i)];
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const uint32_t color = !(tag & MEMTAG_KNOWN) ? COLOR_GRAY : (tag & MEMTAG_DATA) ? ( (tag & (MEMTAG_CODE|MEMTAG_INST)) ? COLOR_MAGENTA : COLOR_BLUE ) : COLOR_GREEN;
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ui::printrect(19+i*3,line,2,1,color);
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}
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@@ -495,7 +497,7 @@ namespace m6502debugger
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for (int i=(num_lines/2)-2;i>=0;--i) {
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pos = find_previous_opcode(pos);
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line_address[i] = pos;
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printDissasemblerLine(pos, i);
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printDissasemblerLine(pos, i, true);
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}
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// REGISTERS
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@@ -540,17 +542,17 @@ namespace m6502debugger
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ui::printrect(midx+2,8, 8,1, COLOR_DARK);
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ui::printtxt(midx+3,8, "STACK:", COLOR_WHITE);
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ui::setoffset(midx+1, 9);
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uint16_t sp = 0x0100 | m6502::getS();//-(((sym_y-12)>>1)<<1);
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uint16_t sp = m6502::getS()+8;//-(((sym_y-12)>>1)<<1);
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for (int i=0; i<10; ++i) {
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uint8_t c1=COLOR_CYAN, c2=COLOR_GRAY;
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if ((sp & 0xff) == m6502::getS()) {
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if (sp == m6502::getS()) {
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ui::printrect(0,i,9,1,COLOR_BLUE);
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c1 = c2 = COLOR_YELLOW;
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}
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ui::printtxt(0,i, tohex(0x0100 | sp, 4), c1);
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uint16_t value = mem::read(0x0100 | sp) + (mem::read(0x0100 | (sp-1))<<8);
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uint16_t value = mem::read(0x0100 | sp-1) + (mem::read(0x0100 | (sp))<<8);
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ui::printtxt(5,i, tohex(value, 4), c2);
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sp+=2;
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sp-=2;
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}
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+10
-8
@@ -89,6 +89,7 @@ namespace m6502
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miIncrementPC,
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miFetchAddressHiToPC,
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miIndexY,
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miFetchOperandHiToPC,
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miNumMicroinstructions
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};
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@@ -102,7 +103,7 @@ namespace m6502
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/* 0x05 ORA zpg */ { miFetchOperandLo, miReadAddress, miFetchOpcode },
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/* 0x06 ASL zpg */ { miFetchOperandLo, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x07 --- */ { miFetchOpcode },
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/* 0x08 PHP */ { miFetchOperandLo, miPushP, miFetchOpcode },
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/* 0x08 PHP */ { miFakeFetchOperand, miPushP, miFetchOpcode },
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/* 0x09 ORA imm */ { miFetchOperandLo, miFetchOpcode },
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/* 0x0A ASL A */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x0B --- */ { miFetchOpcode },
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@@ -128,7 +129,7 @@ namespace m6502
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/* 0x1E ASL abs,X */ { miFetchOperandLo, miFetchOperandHiAndIndexX, miReadAddress, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x1F --- */ { miFetchOpcode },
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/* 0x20 JSR abs */ { miFetchAddressLo, miFakeFetchOperand, miPushPCHi, miPushPCLo, miFetchAddressHi, miFetchOpcode },
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/* 0x20 JSR abs */ { miFetchOperandLo, miFakeFetchOperand, miPushPCHi, miPushPCLo, miFetchOperandHiToPC, miFetchOpcode },
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/* 0x21 AND X,ind */ { miFetchOperandLo, miIndexX, miFetchAddressLo, miFetchAddressHi, miReadAddress, miFetchOpcode },
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/* 0x22 --- */ { miFetchOpcode },
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/* 0x23 --- */ { miFetchOpcode },
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@@ -136,7 +137,7 @@ namespace m6502
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/* 0x25 AND zpg */ { miFetchOperandLo, miReadAddress, miFetchOpcode },
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/* 0x26 ROL zpg */ { miFetchOperandLo, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x27 --- */ { miFetchOpcode },
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/* 0x28 PLP */ { miFetchOperandLo, miPullP, miFetchOpcode },
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/* 0x28 PLP */ { miFakeFetchOperand, miFakeFetchOperand, miPullP, miFetchOpcode },
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/* 0x29 AND imm */ { miFetchOperandLo, miFetchOpcode },
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/* 0x2A ROL A */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x2B --- */ { miFetchOpcode },
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@@ -162,7 +163,7 @@ namespace m6502
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/* 0x3E ROL abs,X */ { miFetchOperandLo, miFetchOperandHiAndIndexX, miReadAddress, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x3F --- */ { miFetchOpcode },
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/* 0x40 RTI */ { miFetchOperandLo, miFakeFetchOperand, miPullP, miPullPCLo, miPullPCHi, miFetchOpcode },
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/* 0x40 RTI */ { miFakeFetchOperand, miFakeFetchOperand, miPullP, miPullPCLo, miPullPCHi, miFetchOpcode },
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/* 0x41 EOR X,ind */ { miFetchOperandLo, miIndexX, miFetchAddressLo, miFetchAddressHi, miReadAddress, miFetchOpcode },
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/* 0x42 --- */ { miFetchOpcode },
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/* 0x43 --- */ { miFetchOpcode },
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@@ -174,7 +175,7 @@ namespace m6502
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/* 0x49 EOR imm */ { miFetchOperandLo, miFetchOpcode },
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/* 0x4A LSR A */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x4B --- */ { miFetchOpcode },
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/* 0x4C JMP abs */ { miFetchAddressLo, miFetchAddressHi, miFetchOpcode },
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/* 0x4C JMP abs */ { miFetchOperandLo, miFetchOperandHi, miFetchOpcode },
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/* 0x4D EOR abs */ { miFetchOperandLo, miFetchOperandHi, miReadAddress, miFetchOpcode },
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/* 0x4E LSR abs */ { miFetchOperandLo, miFetchOperandHi, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x4F --- */ { miFetchOpcode },
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@@ -196,7 +197,7 @@ namespace m6502
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/* 0x5E LSR abs,X */ { miFetchOperandLo, miFetchOperandHiAndIndexX, miReadAddress, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x5F --- */ { miFetchOpcode },
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/* 0x60 RTS */ { miFetchOperandLo, miFakeFetchOperand, miPullPCLo, miPullPCHi, miIncrementPC, miFetchOpcode },
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/* 0x60 RTS */ { miFakeFetchOperand, miFakeFetchOperand, miPullPCLo, miPullPCHi, miIncrementPC, miFetchOpcode },
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/* 0x61 ADC X,ind */ { miFetchOperandLo, miIndexX, miFetchAddressLo, miFetchAddressHi, miReadAddress, miFetchOpcode },
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/* 0x62 --- */ { miFetchOpcode },
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/* 0x63 --- */ { miFetchOpcode },
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@@ -535,9 +536,10 @@ namespace m6502
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int i=0; do { microcode[microcode_last++] = instructions[rI][i++]; } while (instructions[rI][i-1] != miFetchOpcode);
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}
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void FakeFetchOperand() { rAD_lo = mem::read(get_PC()); }
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void FakeFetchOperand() { uint8_t dummy = mem::read(get_PC()); (void)dummy; }
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void FetchOperandLo() { rAD_lo = rB = mem::read(get_PC()); inc_PC(); set_TEMP(rB); }
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void FetchOperandHi() { rAD_hi = mem::read(get_PC()); inc_PC(); }
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void FetchOperandHiToPC() { rAD_hi = mem::read(get_PC()); set_PC(get_AD()); }
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void FetchOperandHiAndIndexX() { rAD_hi = mem::read(get_PC()); inc_PC(); set_TEMP(rAD_lo + rX); rAD_lo = rTEMP_lo; }
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void FetchOperandHiAndIndexY() { rAD_hi = mem::read(get_PC()); inc_PC(); set_TEMP(rAD_lo + rY); rAD_lo = rTEMP_lo; }
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@@ -599,7 +601,7 @@ namespace m6502
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IndexX, FetchAddressLo, FetchAddressHi, FetchAddressHiAndIndex, ReadAddress,
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ReadAddressAndSkip, WriteRegister, WriteAddress, PushA, FetchOperandAndCheckBranch,
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CheckIfPageCrossed, PullPCHi, PullPCLo, PullP, PullA,
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IncrementPC, FetchAddressHiToPC, IndexY };
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IncrementPC, FetchAddressHiToPC, IndexY, FetchOperandHiToPC };
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void reset()
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{
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@@ -37,13 +37,9 @@ namespace atari2600
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should_exit = true;
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}
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int ppc = 0;
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void step()
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{
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//uint8_t t_states;
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uint16_t pc = m6502::getPC();
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ppc += pc;
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m6502debugger::onInstructionExecute(pc);
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uint8_t t_states;
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// if (z80debugger::isbreak(pc, 9)) {
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// msx::pause();
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// z80debugger::show();
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@@ -60,9 +56,11 @@ namespace atari2600
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tia::tick();
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tia::tick();
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pia::tick();
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//t_states++;
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t_states++;
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}
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//speaker::update(t_states);
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uint16_t pc = m6502::getPC();
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m6502debugger::onInstructionExecute(pc);
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speaker::update(t_states);
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// }
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}
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