- [NEW] 6502dis i 6502debugger implementats
- [FIX] font.bmp afegit - [NEW] Afegides regles de comprobació de memòria en la versió debug de compilació en el lagueirtofile - [FIX] la rom ha de carregar abans de atari2600::init() - [NEW] Implementació bàsica del PIA completada. - [FIX] El framebuffer intern en el mòdul TIA era incorrecte. - [NEW] Afegits accesors als registres del 6502 - [NEW] m6502::reset() - [FIX] [6502m] Corregits opcodes amb direccionament implicit: CLC, SEC, PHA, CLI, PLA, SEI, DEY, TXA, TYA, TXS, TAY, TAX, CLV, TSX, INY, DEX, CLD, INX, NOP i SED). Augmentaven el PC una posició de més.
This commit is contained in:
raimon@prometeo
+33
-21
@@ -36,6 +36,11 @@ namespace m6502
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uint16_t exec_PC;
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uint16_t getPC() { return exec_PC; }
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uint8_t getA() { return rA; }
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uint8_t getX() { return rX; }
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uint8_t getY() { return rY; }
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uint8_t getS() { return rS; }
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uint8_t getP() { return rP; }
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// Explicit 16-bit accessors prevent UB and stay host-endian safe
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inline uint16_t get_PC() { return (uint16_t)rPC_lo | ((uint16_t)rPC_hi << 8); }
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@@ -114,7 +119,7 @@ namespace m6502
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/* 0x15 ORA zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miFetchOpcode },
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/* 0x16 ASL zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x17 --- */ { miFetchOpcode },
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/* 0x18 CLC */ { miFetchOperandLo, miFetchOpcode },
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/* 0x18 CLC */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x19 ORA abs,Y */ { miFetchOperandLo, miFetchOperandHiAndIndexY, miReadAddressAndSkip, miReadAddress, miFetchOpcode },
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/* 0x1A --- */ { miFetchOpcode },
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/* 0x1B --- */ { miFetchOpcode },
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@@ -148,7 +153,7 @@ namespace m6502
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/* 0x35 AND zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miFetchOpcode },
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/* 0x36 ROL zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x37 --- */ { miFetchOpcode },
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/* 0x38 SEC */ { miFetchOperandLo, miFetchOpcode },
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/* 0x38 SEC */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x39 AND abs,Y */ { miFetchOperandLo, miFetchOperandHiAndIndexY, miReadAddressAndSkip, miReadAddress, miFetchOpcode },
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/* 0x3A --- */ { miFetchOpcode },
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/* 0x3B --- */ { miFetchOpcode },
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@@ -165,7 +170,7 @@ namespace m6502
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/* 0x45 EOR zpg */ { miFetchOperandLo, miReadAddress, miFetchOpcode },
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/* 0x46 LSR zpg */ { miFetchOperandLo, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x47 --- */ { miFetchOpcode },
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/* 0x48 PHA */ { miFetchOperandLo, miPushA, miFetchOpcode },
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/* 0x48 PHA */ { miFakeFetchOperand, miPushA, miFetchOpcode },
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/* 0x49 EOR imm */ { miFetchOperandLo, miFetchOpcode },
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/* 0x4A LSR A */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x4B --- */ { miFetchOpcode },
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@@ -182,7 +187,7 @@ namespace m6502
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/* 0x55 EOR zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miFetchOpcode },
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/* 0x56 LSR zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x57 --- */ { miFetchOpcode },
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/* 0x58 CLI */ { miFetchOperandLo, miFetchOpcode },
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/* 0x58 CLI */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x59 EOR abs,Y */ { miFetchOperandLo, miFetchOperandHiAndIndexY, miReadAddressAndSkip, miReadAddress, miFetchOpcode },
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/* 0x5A --- */ { miFetchOpcode },
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/* 0x5B --- */ { miFetchOpcode },
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@@ -199,7 +204,7 @@ namespace m6502
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/* 0x65 ADC zpg */ { miFetchOperandLo, miReadAddress, miFetchOpcode },
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/* 0x66 ROR zpg */ { miFetchOperandLo, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x67 --- */ { miFetchOpcode },
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/* 0x68 PLA */ { miFetchOperandLo, miFakeFetchOperand, miPullA, miFetchOpcode },
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/* 0x68 PLA */ { miFakeFetchOperand, miFakeFetchOperand, miPullA, miFetchOpcode },
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/* 0x69 ADC imm */ { miFetchOperandLo, miFetchOpcode },
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/* 0x6A ROR A */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x6B --- */ { miFetchOpcode },
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@@ -216,7 +221,7 @@ namespace m6502
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/* 0x75 ADC zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miFetchOpcode },
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/* 0x76 ROR zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0x77 --- */ { miFetchOpcode },
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/* 0x78 SEI */ { miFetchOperandLo, miFetchOpcode },
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/* 0x78 SEI */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x79 ADC abs,Y */ { miFetchOperandLo, miFetchOperandHiAndIndexY, miReadAddressAndSkip, miReadAddress, miFetchOpcode },
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/* 0x7A --- */ { miFetchOpcode },
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/* 0x7B --- */ { miFetchOpcode },
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@@ -233,9 +238,9 @@ namespace m6502
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/* 0x85 STA zpg */ { miFetchOperandLo, miWriteRegister, miFetchOpcode },
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/* 0x86 STX zpg */ { miFetchOperandLo, miWriteRegister, miFetchOpcode },
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/* 0x87 --- */ { miFetchOpcode },
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/* 0x88 DEY */ { miFetchOperandLo, miFetchOpcode },
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/* 0x88 DEY */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x89 --- */ { miFetchOpcode },
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/* 0x8A TXA */ { miFetchOperandLo, miFetchOpcode },
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/* 0x8A TXA */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x8B --- */ { miFetchOpcode },
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/* 0x8C STY abs */ { miFetchOperandLo, miFetchOperandHi, miWriteRegister, miFetchOpcode },
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/* 0x8D STA abs */ { miFetchOperandLo, miFetchOperandHi, miWriteRegister, miFetchOpcode },
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@@ -250,9 +255,9 @@ namespace m6502
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/* 0x95 STA zpg,X */ { miFetchOperandLo, miIndexX, miWriteRegister, miFetchOpcode },
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/* 0x96 STX zpg,X */ { miFetchOperandLo, miIndexX, miWriteRegister, miFetchOpcode },
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/* 0x97 --- */ { miFetchOpcode },
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/* 0x98 TYA */ { miFetchOperandLo, miFetchOpcode },
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/* 0x98 TYA */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x99 STA abs,Y */ { miFetchOperandLo, miFetchOperandHiAndIndexY, miReadAddress, miWriteRegister, miFetchOpcode },
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/* 0x9A TXS */ { miFetchOperandLo, miFetchOpcode },
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/* 0x9A TXS */ { miFakeFetchOperand, miFetchOpcode },
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/* 0x9B --- */ { miFetchOpcode },
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/* 0x9C --- */ { miFetchOpcode },
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/* 0x9D STA abs,X */ { miFetchOperandLo, miFetchOperandHiAndIndexX, miReadAddress, miWriteRegister, miFetchOpcode },
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@@ -267,9 +272,9 @@ namespace m6502
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/* 0xA5 LDA zpg */ { miFetchOperandLo, miReadAddress, miFetchOpcode },
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/* 0xA6 LDX zpg */ { miFetchOperandLo, miReadAddress, miFetchOpcode },
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/* 0xA7 --- */ { miFetchOpcode },
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/* 0xA8 TAY */ { miFetchOperandLo, miFetchOpcode },
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/* 0xA8 TAY */ { miFakeFetchOperand, miFetchOpcode },
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/* 0xA9 LDA imm */ { miFetchOperandLo, miFetchOpcode },
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/* 0xAA TAX */ { miFetchOperandLo, miFetchOpcode },
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/* 0xAA TAX */ { miFakeFetchOperand, miFetchOpcode },
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/* 0xAB --- */ { miFetchOpcode },
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/* 0xAC LDY abs */ { miFetchOperandLo, miFetchOperandHi, miReadAddress, miFetchOpcode },
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/* 0xAD LDA abs */ { miFetchOperandLo, miFetchOperandHi, miReadAddress, miFetchOpcode },
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@@ -284,9 +289,9 @@ namespace m6502
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/* 0xB5 LDA zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miFetchOpcode },
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/* 0xB6 LDX zpg,Y */ { miFetchOperandLo, miIndexY, miReadAddress, miFetchOpcode },
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/* 0xB7 --- */ { miFetchOpcode },
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/* 0xB8 CLV */ { miFetchOperandLo, miFetchOpcode },
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/* 0xB8 CLV */ { miFakeFetchOperand, miFetchOpcode },
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/* 0xB9 LDA abs,Y */ { miFetchOperandLo, miFetchOperandHiAndIndexY, miReadAddressAndSkip, miReadAddress, miFetchOpcode },
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/* 0xBA TSX */ { miFetchOperandLo, miFetchOpcode },
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/* 0xBA TSX */ { miFakeFetchOperand, miFetchOpcode },
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/* 0xBB --- */ { miFetchOpcode },
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/* 0xBC LDY abs,X */ { miFetchOperandLo, miFetchOperandHiAndIndexX, miReadAddressAndSkip, miReadAddress, miFetchOpcode },
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/* 0xBD LDA abs,X */ { miFetchOperandLo, miFetchOperandHiAndIndexX, miReadAddressAndSkip, miReadAddress, miFetchOpcode },
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@@ -301,9 +306,9 @@ namespace m6502
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/* 0xC5 CMP zpg */ { miFetchOperandLo, miReadAddress, miFetchOpcode },
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/* 0xC6 DEC zpg */ { miFetchOperandLo, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0xC7 --- */ { miFetchOpcode },
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/* 0xC8 INY */ { miFetchOperandLo, miFetchOpcode },
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/* 0xC8 INY */ { miFakeFetchOperand, miFetchOpcode },
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/* 0xC9 CMP imm */ { miFetchOperandLo, miFetchOpcode },
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/* 0xCA DEX */ { miFetchOperandLo, miFetchOpcode },
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/* 0xCA DEX */ { miFakeFetchOperand, miFetchOpcode },
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/* 0xCB --- */ { miFetchOpcode },
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/* 0xCC CPY abs */ { miFetchOperandLo, miFetchOperandHi, miReadAddress, miFetchOpcode },
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/* 0xCD CMP abs */ { miFetchOperandLo, miFetchOperandHi, miReadAddress, miFetchOpcode },
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@@ -318,7 +323,7 @@ namespace m6502
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/* 0xD5 CMP zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miFetchOpcode },
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/* 0xD6 DEC zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0xD7 --- */ { miFetchOpcode },
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/* 0xD8 CLD */ { miFetchOperandLo, miFetchOpcode },
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/* 0xD8 CLD */ { miFakeFetchOperand, miFetchOpcode },
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/* 0xD9 CMP abs,Y */ { miFetchOperandLo, miFetchOperandHiAndIndexY, miReadAddressAndSkip, miReadAddress, miFetchOpcode },
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/* 0xDA --- */ { miFetchOpcode },
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/* 0xDB --- */ { miFetchOpcode },
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@@ -335,9 +340,9 @@ namespace m6502
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/* 0xE5 SBC zpg */ { miFetchOperandLo, miReadAddress, miFetchOpcode },
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/* 0xE6 INC zpg */ { miFetchOperandLo, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0xE7 --- */ { miFetchOpcode },
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/* 0xE8 INX */ { miFetchOperandLo, miFetchOpcode },
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/* 0xE8 INX */ { miFakeFetchOperand, miFetchOpcode },
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/* 0xE9 SBC imm */ { miFetchOperandLo, miFetchOpcode },
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/* 0xEA NOP */ { miFetchOpcode },
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/* 0xEA NOP */ { miFakeFetchOperand },
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/* 0xEB --- */ { miFetchOpcode },
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/* 0xEC CPX abs */ { miFetchOperandLo, miFetchOperandHi, miReadAddress, miFetchOpcode },
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/* 0xED SBC abs */ { miFetchOperandLo, miFetchOperandHi, miReadAddress, miFetchOpcode },
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@@ -352,7 +357,7 @@ namespace m6502
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/* 0xF5 SBC zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miFetchOpcode },
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/* 0xF6 INC zpg,X */ { miFetchOperandLo, miIndexX, miReadAddress, miWriteAddress, miWriteAddress, miFetchOpcode },
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/* 0xF7 --- */ { miFetchOpcode },
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/* 0xF8 SED */ { miFetchOperandLo, miFetchOpcode },
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/* 0xF8 SED */ { miFakeFetchOperand, miFetchOpcode },
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/* 0xF9 SBC abs,Y */ { miFetchOperandLo, miFetchOperandHiAndIndexY, miReadAddressAndSkip, miReadAddress, miFetchOpcode },
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/* 0xFA --- */ { miFetchOpcode },
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/* 0xFB --- */ { miFetchOpcode },
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@@ -598,7 +603,14 @@ namespace m6502
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void reset()
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{
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rPC_lo = mem::read(0xfffc);
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rPC_hi = mem::read(0xfffd);
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exec_PC = get_PC();
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rS = 0xfd;
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rP = 0x34;
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rA = 0;
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rX = 0;
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rY = 0;
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}
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void interrupt(uint8_t type)
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