- [NEW] MBC1 implementat
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mbc1.cpp
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mbc1.cpp
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#include "mbc1.h"
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#include "mem.h"
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#include <stdlib.h>
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#include <SDL2/SDL.h>
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namespace mbc1
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{
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#define ROM_BANK_SIZE 0x4000
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#define RAM_BANK_SIZE 0x2000
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uint8_t bootrom[256];
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uint8_t *rom;
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uint8_t vram[8192];
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uint8_t exram[4 * RAM_BANK_SIZE];
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uint8_t wram[8192];
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uint8_t hram[512];
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uint8_t tags[65536];
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uint8_t current_rom_bank = 1;
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uint8_t current_ram_bank = 0;
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bool ram_enabled = false;
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bool banking_mode = false; // false = ROM banking mode, true = RAM banking mode
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uint8_t getKeypad(uint8_t value)
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{
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const uint8_t *keys = SDL_GetKeyboardState(NULL);
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value = value & 0xf0;
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if (value & 0x10) {
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if (!keys[SDL_SCANCODE_RETURN]) value = value | 0x8;
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if (!keys[SDL_SCANCODE_SPACE]) value = value | 0x4;
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if (!keys[SDL_SCANCODE_Z]) value = value | 0x2;
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if (!keys[SDL_SCANCODE_X]) value = value | 0x1;
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} else if (value & 0x20) {
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if (!keys[SDL_SCANCODE_DOWN]) value = value | 0x8;
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if (!keys[SDL_SCANCODE_UP]) value = value | 0x4;
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if (!keys[SDL_SCANCODE_LEFT]) value = value | 0x2;
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if (!keys[SDL_SCANCODE_RIGHT]) value = value | 0x1;
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} else {
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value = value | 0x0f;
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}
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return value;
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}
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uint8_t readMem(uint16_t address)
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{
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if (address < 0x8000) {
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if ( (address < 0x0100) && ((hram[0x150]&0x01)==0) ) return bootrom[address];
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if (address < 0x4000) {
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// ROM Bank 0
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return rom[address];
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} else {
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// Switchable ROM bank
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uint32_t banked_address = (current_rom_bank * ROM_BANK_SIZE) + (address - 0x4000);
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return rom[banked_address];
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}
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} else if (address < 0xA000) {
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return vram[address - 0x8000];
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} else if (address < 0xC000) {
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if (ram_enabled) {
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uint32_t banked_address = (current_ram_bank * RAM_BANK_SIZE) + (address - 0xA000);
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return exram[banked_address];
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}
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return 0xFF; // Return open bus value when RAM is disabled
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} else if (address < 0xE000) {
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return wram[address - 0xC000];
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} else if (address < 0xFE00) {
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return wram[address - 0xE000];
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} else {
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if (address==0xFF00) {
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hram[address - 0XFE00] = getKeypad(hram[address - 0XFE00]);
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}
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return hram[address - 0XFE00];
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}
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}
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void writeMem(uint16_t address, uint8_t value)
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{
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if (address < 0x8000) {
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if (address < 0x2000) {
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// Enable/disable RAM
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ram_enabled = (value & 0x0F) == 0x0A;
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} else if (address < 0x4000) {
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// Select ROM bank
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value &= 0x1F; // Lower 5 bits are used
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if (value == 0) value = 1; // Bank 0 is not allowed
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current_rom_bank = (current_rom_bank & 0x60) | value;
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} else if (address < 0x6000) {
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// Select RAM bank or upper bits of ROM bank
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if (banking_mode) {
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current_ram_bank = value & 0x03; // 2 bits for RAM bank
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} else {
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current_rom_bank = (current_rom_bank & 0x1F) | ((value & 0x03) << 5);
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}
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} else {
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// Select banking mode
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banking_mode = value & 0x01;
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}
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} else if (address < 0xA000) {
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vram[address - 0x8000] = value;
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} else if (address < 0xC000) {
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if (ram_enabled) {
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uint32_t banked_address = (current_ram_bank * RAM_BANK_SIZE) + (address - 0xA000);
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exram[banked_address] = value;
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}
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} else if (address < 0xE000) {
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wram[address - 0xC000] = value;
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} else if (address < 0xFE00) {
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wram[address - 0xE000] = value;
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} else {
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if ( (address==0xFF50) && ((value&0x01) != 1) ) return; //Only allow disabling boot room
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if ( (address==0xFF00) ) { value = value & 0x30; }
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if ( (address==0xFF04) ) { hram[address-0xFE00] = 0; return; }
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if ( (address==0xFF46) ) mem::init_dma_transfer(value);
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hram[address - 0xFE00] = value;
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}
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}
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uint8_t getTag(uint16_t address)
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{
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return tags[address];
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}
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void setTag(uint16_t address, uint8_t value)
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{
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tags[address] = value;
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}
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void saveState(FILE* f)
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{
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}
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void loadState(FILE *f)
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{
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}
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uint8_t* rawPtr(uint16_t address)
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{
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if (address < 0x8000) {
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if ( (address < 0x0100) && ((hram[0x150]&0x01)==0) ) return &bootrom[address];
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if (address < 0x4000) {
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// ROM Bank 0
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return &rom[address];
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} else {
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// Switchable ROM bank
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uint32_t banked_address = (current_rom_bank * ROM_BANK_SIZE) + (address - 0x4000);
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return &rom[banked_address];
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}
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} else if (address < 0xA000) {
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return &vram[address - 0x8000];
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} else if (address < 0xC000) {
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if (ram_enabled) {
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uint32_t banked_address = (current_ram_bank * RAM_BANK_SIZE) + (address - 0xA000);
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return &exram[banked_address];
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}
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return nullptr; // Return open bus value when RAM is disabled
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} else if (address < 0xE000) {
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return &wram[address - 0xC000];
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} else if (address < 0xFE00) {
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return &wram[address - 0xE000];
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} else {
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return &hram[address - 0XFE00];
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}
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}
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void reset()
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{
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FILE *f = fopen("dmg_boot.bin", "rb");
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if (!f) { printf("ABORTING: 'dmg_boot.bin' not found!\n"); exit(1); }
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fseek(f, 0, SEEK_END);
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const int size = ftell(f);
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fseek(f, 0, SEEK_SET);
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fread(bootrom, size, 1, f);
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fclose(f);
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for (int i=0; i<8192; ++i) { vram[i] = 0; }
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for (int i=0; i<4*RAM_BANK_SIZE; ++i) { exram[i] = 0; }
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for (int i=0; i<8192; ++i) { wram[i] = 0; }
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for (int i=0; i<512; ++i) { hram[i] = 0; }
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for (int i=0; i<65536; ++i) { tags[i] = MEMTAG_NONE; }
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}
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void init(uint8_t *rom, uint32_t rom_size, uint32_t ram_size)
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{
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mem::readMem = mbc1::readMem;
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mem::writeMem = mbc1::writeMem;
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mem::getTag = mbc1::getTag;
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mem::setTag = mbc1::setTag;
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mem::saveState = mbc1::saveState;
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mem::loadState = mbc1::loadState;
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mem::reset = mbc1::reset;
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mem::rawPtr = mbc1::rawPtr;
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mbc1::rom = rom;
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reset();
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}
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}
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