- [NEW] Timer (interrupció inclosa) i divider register implementats

mbc_none.cpp

@@ -71,6 +71,7 @@ namespace mbc_none
         } else {
             if ( (address==0xFF50) && ((value&0x01) != 1) ) return;  //Only allow disabling boot room
             if ( (address==0xFF00) ) { value = value & 0x30; }
+            if ( (address==0xFF04) ) { hram[address-0xFE00] = 0; return; }
             if ( (address==0xFF46) ) mem::init_dma_transfer(value);
             hram[address - 0xFE00] = value;
         }

mem.cpp

@@ -1,4 +1,5 @@
 #include "mem.h"
+#include "sm83.h"
 #include <stdlib.h>
 #include <stdio.h>
 
@@ -20,6 +21,9 @@ namespace mem
     uint8_t dma_pos = 160;
     uint16_t dma_dots = 0;
 
+    uint16_t div_counter = 0;
+    uint16_t timer_counter = 0;
+
     void init(uint8_t* rom, const int size)
     {
         //if (memory) free(memory);
@@ -45,8 +49,35 @@ namespace mem
         dma_dots = 0;
     }
 
+    uint16_t timer_frequencies[4] { 256*4, 4*4, 16*4, 64*4 };
     void update_mapped(const uint32_t dt)
     {
+        // DIV Divider register (0xFF04)  (val com a timer bàsic)
+        div_counter += dt;
+        if (div_counter>=256) {
+            div_counter -= 256;
+            uint8_t *div = mem::rawPtr(0xff04);
+            *div = *div + 1;
+        }
+        
+        // Timer
+        uint8_t *t_regs = mem::rawPtr(0xff05);
+        if (*(t_regs+2)&0x4) { // if bit 3 of mem(0xff07) is 1, timer enabled
+            uint16_t freq = timer_frequencies[*(t_regs+2)&0x03];
+            timer_counter += dt;
+            if (timer_counter>=freq) {
+                timer_counter -= freq;
+                if ((*t_regs)<255)
+                    (*t_regs)++;
+                else {
+                    *t_regs = *(t_regs+1);
+                    sm83::interrupt(INTERRUPT_TIMER);
+                }
+            }
+
+        }
+
+        // OAM DMA
         if (dma_pos<160) {
             dma_dots += dt;
             while (dma_dots >= 4 && dma_pos<160) {