245 lines
7.0 KiB
C++
245 lines
7.0 KiB
C++
#include "mem.h"
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#include "sm83.h"
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#include <stdlib.h>
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#include <stdio.h>
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#include <SDL2/SDL.h>
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#include "APU.h"
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#include "mbc_none.h"
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#include "mbc1.h"
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#define DIV hram[0x104] // 0xff04 - 0xfe00
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#define TIMA hram[0x105] // 0xff05 - 0xfe00
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#define TMA hram[0x106] // 0xff06 - 0xfe00
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#define TAC hram[0x107] // 0xff07 - 0xfe00
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namespace mem
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{
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void (*resetMbc)(void);
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uint8_t (*readRom)(uint16_t);
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void (*writeRom)(uint16_t, uint8_t);
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uint8_t (*readRam)(uint16_t);
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void (*writeRam)(uint16_t, uint8_t);
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uint8_t bootrom[256];
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uint8_t *rom;
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uint8_t vram[8192];
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uint8_t wram[8192];
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uint8_t hram[512];
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uint8_t tags[65536];
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char *title = nullptr;
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uint32_t rom_size = 0;
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uint32_t ram_size = 0;
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uint16_t dma_address = 0;
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uint8_t dma_pos = 160;
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uint16_t dma_dots = 0;
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uint16_t div_counter = 0;
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uint16_t timer_counter = 0;
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void init(uint8_t* rom, const int size)
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{
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title = (char*)&rom[0x134];
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uint8_t mapper_type = rom[0x147];
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rom_size = 32768 * (1 << rom[0x148]);
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int sizes[] = { 0, 0, 8, 32, 128, 64};
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ram_size = sizes[rom[0x149]] * 1024;
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switch (mapper_type)
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{
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case 0x00:
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mbc_none::init(rom, rom_size, ram_size);
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mem::resetMbc = mbc_none::reset;
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mem::readRom = mbc_none::readRom;
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mem::writeRom = mbc_none::writeRom;
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mem::readRam = mbc_none::readRam;
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mem::writeRam = mbc_none::writeRam;
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break;
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case 0x01:
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case 0x02:
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case 0x03:
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mbc1::init(rom, rom_size, ram_size);
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mem::resetMbc = mbc1::reset;
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mem::readRom = mbc1::readRom;
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mem::writeRom = mbc1::writeRom;
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mem::readRam = mbc1::readRam;
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mem::writeRam = mbc1::writeRam;
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break;
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};
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APU::init();
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}
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void reset()
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{
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FILE *f = fopen("dmg_boot.bin", "rb");
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if (!f) { printf("ABORTING: 'dmg_boot.bin' not found!\n"); exit(1); }
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fseek(f, 0, SEEK_END);
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const int size = ftell(f);
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fseek(f, 0, SEEK_SET);
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fread(bootrom, size, 1, f);
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fclose(f);
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for (int i=0; i<8192; ++i) { vram[i] = 0; }
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for (int i=0; i<8192; ++i) { wram[i] = 0; }
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for (int i=0; i<512; ++i) { hram[i] = 0; }
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for (int i=0; i<65536; ++i) { tags[i] = MEMTAG_NONE; }
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resetMbc();
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APU::reset();
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}
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uint8_t getKeypad(uint8_t value)
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{
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const uint8_t *keys = SDL_GetKeyboardState(NULL);
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value = value & 0xf0;
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if (value & 0x10) {
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if (!keys[SDL_SCANCODE_RETURN]) value = value | 0x8;
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if (!keys[SDL_SCANCODE_SPACE]) value = value | 0x4;
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if (!keys[SDL_SCANCODE_Z]) value = value | 0x2;
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if (!keys[SDL_SCANCODE_X]) value = value | 0x1;
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} else if (value & 0x20) {
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if (!keys[SDL_SCANCODE_DOWN]) value = value | 0x8;
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if (!keys[SDL_SCANCODE_UP]) value = value | 0x4;
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if (!keys[SDL_SCANCODE_LEFT]) value = value | 0x2;
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if (!keys[SDL_SCANCODE_RIGHT]) value = value | 0x1;
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} else {
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value = value | 0x0f;
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}
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return value;
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}
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uint8_t readMem(uint16_t address)
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{
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if (address < 0x8000) {
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if ( (address < 0x0100) && ((hram[0x150]&0x01)==0) ) return bootrom[address];
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return readRom(address);
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} else if (address < 0xA000) {
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return vram[address - 0x8000];
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} else if (address < 0xC000) {
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return readRam(address);
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} else if (address < 0xE000) {
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return wram[address - 0xC000];
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} else if (address < 0xFE00) {
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return wram[address - 0xE000];
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} else {
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if (address==0xFF00) {
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hram[address - 0XFE00] = getKeypad(hram[address - 0XFE00]);
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} else if (address>=0xFF10 && address<=0xFF26) { return APU::readRegister(address); }
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return hram[address - 0XFE00];
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}
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}
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void writeMem(uint16_t address, uint8_t value)
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{
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if (address < 0x8000) {
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writeRom(address, value);
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} else if (address < 0xA000) {
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vram[address - 0x8000] = value;
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} else if (address < 0xC000) {
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writeRam(address, value);
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} else if (address < 0xE000) {
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wram[address - 0xC000] = value;
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} else if (address < 0xFE00) {
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wram[address - 0xE000] = value;
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} else {
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if ( (address==0xFF50) && ((value&0x01) != 1) ) {
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return; //Only allow disabling boot room
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} else if ( (address==0xFF00) ) {
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value = value & 0x30;
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} else if ( (address==0xFF04) ) {
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hram[address-0xFE00] = 0;
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return;
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} else if ( (address==0xFF0F) ) { // IF
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hram[address-0xFE00] = value;
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sm83::processInterrupts();
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return;
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} else if (address>=0xFF10 && address<=0xFF26) { // APU
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APU::writeRegister(address, value);
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return;
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} else if ( (address==0xFF46) ) { // OAM DMA
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mem::init_dma_transfer(value);
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}
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hram[address - 0xFE00] = value;
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}
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}
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uint8_t getTag(uint16_t address)
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{
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return tags[address];
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}
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void setTag(uint16_t address, uint8_t value)
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{
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tags[address] = value;
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}
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void saveState(FILE* f)
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{
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}
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void loadState(FILE* f)
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{
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}
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uint8_t *rawPtr(uint16_t address)
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{
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return &hram[address-0xfe00];
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}
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void init_dma_transfer(uint8_t source)
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{
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dma_address = source << 8;
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dma_pos = 0;
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dma_dots = 0;
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}
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uint16_t timer_frequencies[4] { 256*4, 4*4, 16*4, 64*4 };
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void update_mapped(const uint32_t dt)
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{
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// DIV Divider register (0xFF04) (val com a timer bàsic)
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div_counter += dt;
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if (div_counter>=256) {
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div_counter -= 256;
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bool bitset = DIV&0x10;
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DIV++;
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if (bitset && !(DIV&0x10)) APU::incDIVAPU();
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}
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// Timer
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if (TAC&0x4) { // if bit 3 of mem(0xff07) is 1, timer enabled
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uint16_t freq = timer_frequencies[TAC&0x03];
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timer_counter += dt;
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if (timer_counter>=freq) {
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timer_counter -= freq;
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if (TIMA<255)
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TIMA++;
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else {
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TIMA = TMA;
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sm83::interrupt(INTERRUPT_TIMER);
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}
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}
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}
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// APU
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APU::update(dt);
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// OAM DMA
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if (dma_pos<160) {
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dma_dots += dt;
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while (dma_dots >= 4 && dma_pos<160) {
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dma_dots -= 4;
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hram[dma_pos] = mem::readMem(dma_address|dma_pos);
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dma_pos++;
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}
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}
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}
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}
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